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Intel Foundry

For years, Extreme Ultraviolet Lithography (EUV) has been broadly painted as the future of the industry, fifty-fifty as its supposed integration into mainstream manufacturing has been shoved further and further into the time to come. Now, a grouping of researchers at MIT accept demonstrated compelling evidence that Directed Self-Associates (DSA) might be an easier fashion to manufacture chips beneath 10nm, provided sure problems can be overcome.

DSA isn't a standalone manufacturing process. Information technology's a complementary method of printing structures using chemical processes. At that place are materials that self-assemble at the nanoscale when "directed" to do and so with ane of a variety of techniques. Here's how MIT News describes the process:

First, a blueprint of lines is produced on the chip surface using well-established lithographic techniques… And so, a layer of material known as a block copolymer — a mix of two unlike polymer materials that naturally segregate themselves into alternating layers or other predictable patterns — is formed by spin coating a solution…

Finally, a peak, protective polymer layer is deposited on tiptop of the others using initiated chemical vapor deposition (iCVD).

The original lithographic design forms the guide for the copolymer line position. Merely the chemic process results in lines that are much smaller than the original, as shown below:

MIT-Self-Assembled-Patterns_0

Image provided by the researchers via MIT News

The fact that research teams at MIT, the Academy of Chicago, and Argonne National Laboratory have managed to create lines below the 10nm mark is impressive in and of itself. Only the same paradigm that proves the achievement also demonstrates a major problem with the engineering science. Look at the image, and you lot'll see that the lines are scarcely directly, with several of them near touching at various points. The deviation of a feature edge from its ideal shape is called line-border roughness (LER). It's a significant trouble in multi-patterning, simply information technology's an even more significant issue in DSA.

To empathize why LER is a major roadblock, imagine beingness asked to freehand draw 2 straight lines 1 pes apart, with no more than a ii-inch deviation from a perfectly directly line. Now, imagine being asked to freehand draw ii lines two millimeters autonomously, with a 0.33mm deviation from a perfectly directly line. The first task isn't peculiarly hard; the second would be incommunicable for virtually of us. Every bit process nodes shrink, the margin of error for line noise shrinks as well.

Over at Semiengineering, Mark Lapedus delved into why DSA hasn't been every bit successful equally some thought it would be. The silicon manufacture has, thus far, flung most of its resources towards multi-patterning in the short-term and EUV in the long term. It may exist possible to build memory chips, with their extremely regular structures, using DSA, but logic circuits (CPUs, ASICs) face daunting challenges:

"There are particular challenges for logic," said Harry Levinson, senior boyfriend and senior director of technology research at GlobalFoundries. "To go the types of shrinks nosotros need, nosotros need to have more a single pitch. Getting that for line/space patterns with DSA is problematic today. Again, when yous attempt to use it for contact and via layers, it's getting the not-periodic structures that you get in random logic. There also has to be a lot more than work done on the lithography design co-optimization side to brand this work. In that location needs to be more than work that takes place in terms of creating a low defect process on the wafer. In that location are still a lot of substantial issues here."

This is non to say that the electric current work on directed self-assembly at the 10nm node isn't important, or that it's doomed to neglect. But there doesn't seem to currently exist much of a market for DSA products or near-term integration with standard lithography manufacturing techniques.

Now read: The myths of Moore'due south Law